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PDS Tech Inc Electrical Engineer in Cedar Rapids, Iowa

PDS Tech, Inc. is seeking Electrical Engineer near Cedar Rapids, IA

Role Overview:

Commercial Avionics is looking for a ASIC/FPGA engineer to join our Integrated Circuits Engineering team. This position is for an Electrical or Computer Engineer that will be involved in the design, implementation, verification and integration of a wide variety of high-performance digital systems that incorporate ASICs and FPGAs into a product solution. As an engineer in this organization, you will be employing best practice design methodologies and processes to support our numerous products enterprise-wide.

Primary assignments and Key Responsibilities will include:

  • ASIC/FPGA digital design

  • RTL coding and simulation in VHDL or System Verilog

  • Certification of hardware in compliance with DO-254

Basic Qualifications:

• Knowledge of ASIC & FPGA Design Flows

• Requirements decomposition and linking

• Development of test cases and test procedures

• Experience using FPGA vendor specific tools (e.g. Vitis, Vivado, Libero, and Quartus)

• Experience with ASIC specific tools (e.g Synopsys Design Compiler, Cadence Conformal LEC)

• Experience with data interfaces (PCIe, DDR, Ethernet, CDN, ARINC-429, I2C...)

• Experience with implementing solutions that contain 3rd party IP.

• Experience with revision control concepts and tools (e.g. Subversion)

• Experience using simulation tools (e.g. Questasim/Modelsim)

• Perform timing analysis and achieving timing closure (e.g Primetime)

• Strong oral and written communication skills

• Bachelor's Degree in applicable engineering field

• A successful candidate will be expected to lead small projects on their own and mentor with more senior engineers to expand their understanding of display engineering best practices, and enterprise processes

Preferred Qualifications:

• Experience of certification of Hardware with compliance to DO-254

• ASIC / FPGA hardware integration with advanced lab equipment

• Requirements based testbench development for the verification of RTL blocks using VHDL or System Verilog

• Familiarity with best practice verification techniques and languages (e.g. constrained random, functional coverage, OVM/UVM)

• Knowledge of Design for Test (DFT) methodologies and the ability to troubleshoot test issues

• Experience with Linux, scripting, C/C++, Python, Perl, languages

All qualified applicants will receive consideration for employment without regard to race, color, sex, sexual orientation, gender identity, religion, national origin, disability, veteran status, age, marital status, pregnancy, genetic information, or other legally protected status.

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