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PDS Tech Inc Staff Engineer ASIC/FPGA (VHDL) Designer in Redondo Beach, California

PDS Tech, Inc. is seeking a Staff Engineer ASIC/FPGA (VHDL) Designer, in Redondo Beach, CA.

Summary:

  • VHDL design of ASIC and/or FPGA logic, with an emphasis in Digital Signal Processing

  • FPGA/ASIC verification via simulation and emulation (lab testing), synthesis, timing analysis, and place and route for FPGA

  • FPGA design for Space environment or Space Application

Qualifications:

Basic Qualifications:

  • Bachelor’s Degree in Electrical or Computer Engineering from an accredited institution with minimum of 14+ years of experience with Logic Design in VHDL or Verilog; or 12+ years of experience with Master’s Degree

  • 7+ years of Digital Signal Processing design experience.

  • Well versed in VHDL design for aerospace environment or space application

  • US Citizenship required

Preferred Qualifications:

  • Hands-on lab experience with testing of digital hardware is highly desired.

  • 12 years of Digital Signal Processing design experience.

  • Must have the ability to obtain and retain an active Security Clearance

All qualified applicants will receive consideration for employment without regard to race, color, sex, sexual orientation, gender identity, religion, national origin, disability, veteran status, age, marital status, pregnancy, genetic information, or other legally protected status.

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